mram: from stt to sot, for security and memory
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| Date | 2019 |
| Date | |
| Auteurs | Kharbouche-harrari,- M | Alhalabi,- R | Postel-pellerin,- J | Wacquez,- R | Aboulkassimi,- D | Nowak,- E | Prejbeanu,- Il | Prenat,- G | Pendina,- Gd | |
| Source | 2018 IEEE Global Conference on Signal and Information Processing, GlobalSIP 2018 | 33rd Conference on Design of Circuits and Integrated Systems, DCIS 2018 | |
| Résumé | Spin Transfer Torque Magnetic Random Access Memory (STT-MRAM) is one of the leading candidates for embedded memory convergence in advanced technology nodes. It is particularly adapted to low-power applications, requiring a decent level of performance. However, it also have interests for secured applications. The PRESENT cipher is a lightweight cryptographic algorithm targeting ultra-low power applications such as the Internet of Things or RFID. This paper aims to combine this low power cryptographic algorithm with the STT-MRAM which main feature is its low consumption. This new generation of ciphers is very interesting for normally-off applications. Actually, for these specific applications hybrid CMOS/STT-MRAM ciphers consume less power than pure CMOS cryptographic algorithms.Although the performance of STT-MRAM is much better than standard non-volatile technologies like flash, it suffers from limitations for high-speed applications. A new MRAM technology based on Spin-Orbit Torque (SOT) was recently discovered and offers better performance in terms of speed and endurance, at the expense of a slightly degraded density. In this paper, we also propose a comparative study of several architectures of SOT-MRAM memories for evaluating the possible advantages of this NV technology for high-speed applications. © 2018 IEEE. |
| DOI | http://dx.doi.org/10.1109/DCIS.2018.8681468 |
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